Critical Issue
When you turn on the Enable Error Detection and Correction Logic option, the ECC Interrupt function is not turned on by default.
This issue affects all configurations using ALTMEMPHY-based interfaces and version 11.0 or later of the high-performance controller II with the Enable Error Detection and Correction Logic option turned on.
When a single-bit or double-bit error occurs, the ECC logic
does not trigger the ecc_interrupt
signal.
There is no workaround for this issue for VHDL designs.
For Verilog designs, the workaround is to open the <variation_name>_alt_mem_ddrx_controller_top.v
file
in an editor and change the line:
.CFG_ENABLE_INTR(CFG_ENABLE_INTR),
to
.CFG_ENABLE_INTR(CTL_ECC_ENABLED),
This issue will be fixed in a future version.