Article ID: 000078662 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why do I see increased placement time when compiling my design in the Quartus II software version 11.1?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a change in the Quartus® II software version 11.1, you may see increased placement time when compiling your design compared to previous versions of the Quartus II software. The base placement optimization effort has been increased in the Quartus II software version 11.1 because this improves timing closure for the majority of designs. The increase in placement time during the Fitter is offset by fewer iterations required to close timing.

Resolution

You can change the base placement effort level by

  • Decrease the placement effort multiplier below 1.0 for easy-to-fit designs which may speed up placement time.
  • Increase the placement effort multiplier above 1.0 for hard-to-fit designs which may slow down placement time.

For more information, see the Reducing Compilation Time (PDF) chapter of the Quartus II Handbook.

Related Products

This article applies to 1 products

Intel® Programmable Devices

1