Article ID: 000078483 Content Type: Troubleshooting Last Reviewed: 06/10/2016

Using the Altera SDK for OpenCL Version 16.0.1 to Compile an OpenCL Design that Targets a 16.0 Version of the Arria 10 Reference or Custom Platform Results in a Fatal Error


  • Intel® Arria® 10 FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition

    Critical Issue


    If you use the Altera® SDK for OpenCL (AOCL) version 16.0.1 to compile an OpenCL design that targets a 16.0 version of the Arria 10 Reference or Custom Platform (for example, Arria® 10 GX FPGA Development Kit Reference Platform), the Altera Offline Compiler will encounter a fatal error with the following error message:

    Error: Compiler Error, not able to generate hardware

    In addition, the <kernel_name>/quartus_sh_compile.log file includes the following error messages:

    Error (15653): The Fitter cannot find a legal configuration for the following atoms. Update any outdated transceiver PHY IP cores, correct any illegal pin assignments, and then recompile your design. Error (15744): In atom \'board_inst|pcie|altpcie_a10_hip_pipen1b|wys\' Error (15744): The settings must match one or more of these conditions: Error (15744): ( g3_ltssm_rec_dbg == TRUE ) OR ( sim_mode == ENABLE ) OR ( sup_mode == ENGINEERING_MODE ) Error (15744): But the following assignments violate the above conditions: Error (15744): g3_ltssm_rec_dbg = FALSE Error (15744): sim_mode = DISABLE Error (15744): sup_mode = USER_MODE Error (18590): The imported netlist contains settings that are not supported by the current version of the software. Import using the --timing_analysis_mode option, which ignores the errors and allows Timing Analysis to be run. Error: design::import_design -file base.qdb -overwrite failed!

    Use a version of the AOCL that matches the version of your Arria 10 Reference or Custom Platform. If you wish to use AOCL version 16.0.1, contact your board vendor to acquire the 16.0.1 version of the Arria 10 Custom Platform (if available).



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