Due to a problem in the Quartus II software version 13.0sp1 and earlier, the output of DQS logic block may cause random read errors.
The following configurations may be affected:
- Arria® V: DDR3 and DDR3L SDRAM designs operating below 450 MHz
- Arria V: All supported operating frequencies for DDR2/LPDDR2 SDRAM
- Cyclone® V: All supported operating frequencies for DDR3/DDR3L/DDR2/LPDDR2 SDRAM
This issue has been fixed with the Quartus II software version 13.0sp1 dp5 and later.