Article ID: 000078118 Content Type: Error Messages Last Reviewed: 03/31/2014

Error (129036): Output port DATAOUT on atom "<slave DQS signal>", which is a arriav_delay_chain primitive, is not connected to a valid destination

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

This error may occur during synthesis when the afi_reset_n signal of a slave controller is not connected to the master controller's afi_reset_n output.

Resolution

Connect the afi_reset_n of the slave controller to the master controller\'s afi_reset_n output.

Related Products

This article applies to 21 products

Arria® II GX FPGA
Stratix® IV GT FPGA
Stratix® V GT FPGA
Cyclone® V GX FPGA
Stratix® V GS FPGA
Arria® V GZ FPGA
Arria® V SX SoC FPGA
Cyclone® V ST SoC FPGA
Arria® V ST SoC FPGA
Arria® V GX FPGA
Stratix® III FPGAs
Stratix® IV GX FPGA
Arria® II GZ FPGA
Cyclone® V SX SoC FPGA
Cyclone® V GT FPGA
Stratix® V GX FPGA
Cyclone® V E FPGA
Stratix® V E FPGA
Arria® V GT FPGA
Stratix® IV E FPGA
Cyclone® V SE SoC FPGA

1