Why do I see a high Bit Error Rate (BER) when using the Intel® Quartus® Prime Software Transceiver Toolkit to tune my Intel® Stratix®10 and Intel Agilex® 7 FPGA E-Tile transceivers in PAM4 mode?

The accepted BER of transceivers running with PAM4 modulation is much higher than for NRZ.

For example:

• The Ethernet 25GBASE-KR/CR/GAUI 802.3by and 100GBASE-KR4/KP4 802.3bj IEEE specifications with NRZ modulation allow a BER of 10E-12 without Forward Error Correction (FEC).
• The Ethernet 100GBASE-KR2/CR2 802.3cd IEEE specification with PAM4 modulation allows a BER of 10E-5 without FEC.

For this reason, an FEC is mandatory for PAM4 modulated Ethernet configurations. Other protocols may have different acceptable BER requirements.

The Intel® Quartus® Prime Software Transceiver Toolkit lets you tune the E-Tile transceiver PMA. The Transceiver Toolkit BER is calculated on the raw PRBS data and does not include the FEC.

For full system BER, you should consider the effect of the FEC in your system and analyze corrected and uncorrected error FEC status registers.