Why might I see incorrect clock frequency in the khz_rx (0x341) and khz_tx (0x342) registers of E-Tile Hard IP for Ethernet Intel® FPGA IP ?

You might see incorrect frequency in the khz_rx (0x341) and khz_tx (0x342) registers of E-Tile Hard IP for Ethernet Intel® FPGA IP if the i_reconfig_clk frequency is not 100 MHz.

Because the frequency value is measured on the assumption that the i_reconfig_clk frequency is 100 MHz.

If the i_reconfig_clk frequency is not 100 MHz, the khz_rx (0x341) and khz_tx (0x342) register values are calculated with the equation below, respectively. 

• khz_rx (0x341) : Recovered clock frequency /10* [100 MHz / i_reconfig_clk (MHz) ], in KHz
• khz_tx (0x342) : TX clock frequency /10* [100 MHz / i_reconfig_clk (MHz) ], in KHz

The description problem is scheduled to be fixed in a future release of the UG-20160.