Article ID: 000077444 Content Type: Troubleshooting Last Reviewed: 11/28/2024

If the Stratix®10 L- or H-Tile device is left in power up but not configured state, would the unused transceiver channels be subjected to performance degradation?

Environment

    Intel® Quartus® Prime Pro Edition
    L-Tile H-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP
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Critical Issue

Description

Yes, if the device is left in this state for a long interval, the transceiver channels performance will degrade. 

Resolution

There is no resolution to this subject. 
 

Related Products

This article applies to 4 products

Intel® Stratix® 10 GX FPGA
Intel® Stratix® 10 SX SoC FPGA
Intel® Stratix® 10 MX FPGA
Intel® Stratix® 10 TX FPGA

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