Article ID: 000077414 Content Type: Troubleshooting Last Reviewed: 10/20/2016

Why does my Stratix 10 L-tile device simplex receiver have low jitter tolerance when no transmitter is used for that channel?

Environment

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Description

Due to a problem in the Quartus ® Prime software version 17.0 ES Edition and earlier calibration code, your Stratix 10 device simplex receiver may have low jitter tolerance when no transmitter is used in that channel.

Resolution

To work around this problem, you can instantiate a simplex TX transceiver and merge it into the same channel as the simplex RX transceiver.

After calibration is complete you can write a 1'b0 to address offset 0x10F to stop the TX serializer clock from toggling and save power. If user-mode recalibration must be run again, you must first turn the TX serializer back on by writing a 1'b1 to address offset 0x10F.

This problem is scheduled to be fixed in a future version of the Quartus Prime software.

Related Products

This article applies to 1 products

Intel® Stratix® 10 FPGAs and SoC FPGAs

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