Description
This error may be seen in the Intel® Quartus® Prime Software when merging reconfiguration interfaces across multiple Native PHY IP blocks for Intel® Arria® 10, Intel® Cyclone® 10 GX, or Intel® Stratix® 10 L-Tile/H-Tile device.
Resolution
To avoid this error, option "NPDME", "optional reconfiguration logic" or "embedded reconfiguration streamer" need to be disabled in the Native PHY IP.