Article ID: 000077341 Content Type: Troubleshooting Last Reviewed: 07/26/2018

Why there is no description of the OpenCL library AVALON_MEM element for some signals?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Intel® FPGA SDK for OpenCL™
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The OpenCL programming advance guide explains about the RTL element required for the library for external memory.

    For the AVALON_MEM element defined in the code example, the corresponding RTL module ports are as follows:


    output avm_port0_enable,
    input [511:0] avm_port0_readdata,
    input avm_port0_readdatavalid,
    input avm_port0_waitrequest,
    output [31:0] avm_port0_address,
    output avm_port0_read,
    output avm_port0_write,
    input avm_port0_writeack,
    output [511:0] avm_port0_writedata,
    output [63:0] avm_port0_byteenable,
    output [4:0] avm_port0_burstcount,


    There is no assumed correspondence between pointers that you specify with
    MEM_INPUT and the Avalon-MM interfaces that you specify with AVALON_MEM. An RTL module can use a single pointer to address zero to multiple Avalon-MM interfaces

     

    Both signals in bold are not documented.

     

     

    Resolution

    In most applications the avm_port0_enable signal can be tied high, and the avm_port0_writeack signal can be ignored. An updated description will be included in the upcoming programming guide.

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