Description
The E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP in the Intel Quartus® Prime Pro Edition Software versions 18.1.1 and before shows the supported reference clock frequency range between 125 MHz - 500 MHz.
The supported reference clock frequency range supported by the E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP is intended to be 125 MHz to 700 MHz.
Resolution
125 MHz to 700 MHz reference clocks support for E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP is supported in the Intel Quartus® Prime Pro Edition Software versions 22.4.