Article ID: 000077319 Content Type: Troubleshooting Last Reviewed: 08/16/2023

Why does Platform Designer hang when modifying a design with the Hard Processor System Intel® Stratix® 10 FPGA IP?

Environment

    Intel® Quartus® Prime Pro Edition
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Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 18.1, Platform Designer may hang when editing a system with the Hard Processor System Intel® Stratix® 10 FPGA IP because there is not enough Java heap space allocated by default. 

Resolution

To work around this problem, increase the allocated java heap space as necessary by starting Platform Designer from the command line with the option “--jvm-max-heap-size=<size>m”.  It is recommended to use 16384 for <size>, but this may need to be increased to 32768 for large systems. 

For example, “qsys-edit –jvm-max-heap-size=16384m my_project.qsys”.  

Related Products

This article applies to 2 products

Intel® Stratix® 10 SX SoC FPGA
Intel® Stratix® 10 TX FPGA

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