Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 20.2 and earlier, you might see the following error message when you implement a design containing both the Intel Agilex® EMIF IP and the Intel Agilex® 3 HPS EMIF IP.
Error(20959): Module instance "emif_fm_hps_0|emif_fm_hps_0|arch|arch_inst|pll_inst|pll_inst", which is a tennm_iopll primitive, has unexpected connections on port LOCK.
Info(20960): Module: emif_fm_hps_0|emif_fm_hps_0|arch|arch_inst|pll_inst|pll_lock_issp|altsource_probe_body_inst|wider_probe_gen.wider_probe_inst|i118~1 Port: DATAC
To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 20.2 and earlier, delete or comment out the following assignment in the .qsf file:
set_global_assignment -name VERILOG_MACRO "ALTERA_EMIF_ENABLE_ISSP=1
This problem is fixed in the Intel Quartus Prime Pro Edition Software version 20.3.