Critical Issue
Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 19.4 and earlier, the Intel Stratix® 10 MX HBM2 IP doesn't assert the axi_<x>_<y>_rvalid signal until the axi_<x>_<y>_rready signal is asserted from the user interface.
Note that <x> and <y> refer to channel and pseudo-channel number respectively.
For the Intel® Quartus® Prime Pro Edition Software version 19.3 and earlier, you can work around this problem by opening the altera_axi_ufi_soft_logic.sv file and changing the following:
(starting from line 423:)
assign ufi_rready = PHY_THROTTLE_RDATA_BRESP ?
// (rready & rdata_fifo_almost_empty) : rready; // before
(rdata_fifo_almost_empty) : rready; //after
generate if(PHY_THROTTLE_RDATA_BRESP) begin
// assign rvalid = (rready & ~rdata_fifo_empty); //before
assign rvalid = (~rdata_fifo_empty); //after
This problem is scheduled to be fixed in a future release of the Intel Quartus Prime Pro Edition Software.