Article ID: 000076608 Content Type: Error Messages Last Reviewed: 02/01/2023

Error (169280): There are 39 true differential input buffers in the design, but only 37 true differential input buffer locations available on the device

Environment

    Intel® Quartus® Prime Standard Edition
    LVDS SERDES Intel® FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a known problem in Intel® Quartus® Prime Software version 18.0, you may see this error when targeting Cyclone® V SE devices if using differential I/O pins and HPS pins. 

 

 

 

Resolution

This error occurs because the HPS pins are incorrectly assumed to be differential I/O pins.

Related Products

This article applies to 1 products

Cyclone® V SE SoC FPGA

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