Article ID: 000076591 Content Type: Troubleshooting Last Reviewed: 03/27/2017

Can the 40- and 100-Gbps Ethernet MAC and PHY achieve 100 % bandwidth in all configurations?

Environment

  • Stratix® IV GT FPGA
  • Stratix® V GS FPGA
  • Stratix® V GT FPGA
  • Stratix® V GX FPGA
  • Arria® V GZ FPGA
  • Stratix® IV GX FPGA
  • Quartus® II Subscription Edition
  • Ethernet
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    Description

    No, the Tx of 40- and 100-Gbps Ethernet MAC and PHY IP Core cannot achieve 100 % bandwidth for some packet sizes if the preamble pass-through or the TX CRC pass-through options are enabled. The RX can reach 100 % bandwidth regardless of options.

    Resolution

    Disable both the preamble pass-through option and the TX CRC pass-through option.

    Another workaround is to migrate to the Low Latency 40- and 100-Gbps Ethernet MAC and PHY IP Core.

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