Due to a mistake in the E-Tile Hard IP User Guide, a Reset Controller register required when switching from 100G MAC PCS with RS-FEC to 100G MAC PCS mode is not documented.
The E-Tile RS-FEC includes a port called rsfec_signal_ok. When performing dynamic reconfiguration from one mode to another the reset controller waits for this signal to assert as part of the reset sequence. However, in the non RS-FEC mode, this signal will not assert, this results in the channel getting stuck in reset when switching from 100G RS-FEC mode to non RS-FEC mode.
Bit of the undocumented reset controller register at address 0x313 instructs the reset controller to ignore the rsfec_signal_ok port.
This undocumented E-Tile reset controller register is correctly used in the E-Tile 100G Ethernet Dynamic Reconfiguration Design Example.
- When switching from 100G MAC PCS with RS-FEC to 100G MAC PCS non RS-FEC mode set Bit of register 0x313
- When switching from 100G MAC PCS non RS-FEC to 100G MAC PCS with RS-FEC clear Bit of register 0x313
This missing information has been added to version will be added to release UG-20160|2020.12.14 of the E-Tile Hard IP for Ethernet user guide.