Article ID: 000076576 Content Type: Troubleshooting Last Reviewed: 11/04/2020

Is the byte parity odd in the Intel® Stratix® 10 Avalon® streaming and Single Root I/O Virtualization (SR-IOV) Interface for PCI Express*?

Environment

  • Intel® Stratix® 10 MX FPGA
  • Intel® Stratix® 10 TX FPGA
  • Intel® Stratix® 10 SX SoC FPGA
  • Intel® Stratix® 10 GX FPGA
  • Intel® Quartus® Prime Pro Edition
  • Avalon-ST Intel® Stratix® 10 Hard IP for PCI Express
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The byte parity is EVEN when using the Intel® Stratix® 10 Avalon® streaming and Single Root I/O Virtualization (SR-IOV) Interface for PCI Express* .

    There is mistake in the description of UG-20032 | 2020.06.03.

    Resolution

    This mistake will be fixed in a future release of the Intel® Stratix® 10 Avalon® streaming and Single Root I/O Virtualization (SR-IOV) Interface for PCI Express* Solutions User Guide.

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