How do I fix the illegal clock warnings associated with clocktopld and observablebyteserdesclock signals on Channel 4 of PCIe x8 Hard IP implementation?

You may see the following errors on physical Channel 4 of PCIe® x8 Hard IP implementation during TimeQuest analysis.

<PCIe instance path>|g_xcvr.sv_xcvr_pipe_native|inst_sv_xcvr_native|inst_sv_pcs|ch[4].inst_sv_pcs_ch|inst_stratixv_hssi_8g_rx_pcs|wys|clocktopld

<PCIe instance path>|g_xcvr.sv_xcvr_pipe_native|inst_sv_xcvr_native|inst_sv_pcs|ch[4].inst_sv_pcs_ch|inst_stratixv_hssi_8g_rx_pcs|wys|observablebyteserdesclock

Physical channel Ch[4] in PCIe x8 hard IP implementation is used internally, but not as a data channel.  Hence, these illegal clock warnings associated with Ch[4] should not affect the link operation.

You can safely ignore these warnings.

This issue is not scheduled to be fixed.