Article ID: 000076425 Content Type: Product Information & Documentation Last Reviewed: 02/14/2023

How do I set the input and output frame rate registers when using the Intel® Video and Image Processing (VIP) Suite Frame Buffer II IP Core?

Environment

    Intel® Quartus® Prime Pro Edition
    Frame Buffer II (4K Ready) Intel® FPGA IP
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Description

To support locked rates, locked rate support, frame dropping, and frame repeating must be enabled. As stated in the Frame Buffer Application Example in chapter 16.6 of the Intel® Video and Image Processing (VIP) Suite User Guide, registers 10 and 11 must be programmed (default values don’t apply) with the required input and output rates. Program the registers to match the system requirements.


To support smooth frame rate conversion without locked rate support, only enable frame dropping and repeating. The Frame Buffer II IP automatically handles the conversion of the selected frame rates. It is not necessary to program registers 10 and 11 because locked rate support hasn’t been enabled.


When buffering video, which fundamentally stays at the same frame rate but processing/IO requirements result in slight differences in the burst format of the data stream to the output, configure no locked rate, no frame drop, and no frame repeat. The frame rate will be maintained, and the output will be smoothed. 

 

All systems should fall into one of these three categories. Table 67 Example Use Cases for Various Locked and Frame Dropping/Repeating should be referred to when identifying which configuration should be used. It does not limit what frame rates are supported.

 

Resolution

This problem is fixed starting with the Intel® Video and Image Processing (VIP) Suite User Guide Document Version 2020.10.30. 

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