Description
You might see the above error starting with the Intel® Quartus® Prime Software version 16.1.1 if your EMIF Intel FPGA IP uses input termination below 50 ohms for the following I/O standards:
- 1.5 V SSTL (DDR3)
- 1.35 V SSTL (DDR3L)
- 1.5 V HSTL (QDRII/II /II Xtreme)
- 1.2 V SSTL (QDR IV, LPDDR3)
- 1.2 V HSTL (RLDRAM3)
Margins improve when values of 50 ohms or higher are selected.
Resolution
N/A