Article ID: 000076310 Content Type: Error Messages Last Reviewed: 04/01/2020

ERROR : Expected ARI Control = 0x00000000 -- Actual = 0x00000100

Environment

  • Intel® Stratix® 10 DX FPGA
  • Intel® Agilex™ F-Series FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • Avalon-ST Intel® Stratix® 10 Hard IP for PCI Express
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Due to a problem with the Intel® Quartus® Prime software version 19.4, you may encounter above error when running the Intel® FPGA P-Tile Avalon® Streaming (Avalon-ST) IP generated example design simulation where the SR-IOV is turned on and the Physical Function (PFs) count is set to 1.

    Resolution

    To work around this simulation problem, set the Physical Function (PFs) count to more than 1.

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime software.

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.