Critical Issue
Description
Due to a problem with the Intel® Quartus® Prime Software version 19.4, you may encounter the above error when running the Intel® FPGA P-Tile Avalon® Streaming (Avalon-ST) IP generated example design simulation where the SR-IOV is turned on and the Physical Function (PFs) count is set to 1.
Resolution
To work around this simulation problem, set the Physical Function (PFs) count to more than 1.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Software.