Article ID: 000076254 Content Type: Troubleshooting Last Reviewed: 10/21/2020

Why do the 25G Ethernet Intel® Arria® 10 FPGA IP core, Intel® 50 Gbps Ethernet (50GbE) IP core, and the 25G Ethernet Intel® Stratix® 10 FPGA IP core incorrectly report oversized frames for VLAN and Stacked VLAN Tagged frames?

Environment

    Intel® Quartus® Prime Pro Edition
    Intel® Quartus® Prime Standard Edition
    25G Ethernet Intel® FPGA IP
    50G Ethernet Intel® FPGA IP
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Critical Issue

Description

Due to a problem with the IP Cores listed above, oversized frames are incorrectly reported to VLAN/Stacked VLAN tagged frames when all conditions below are met:

VLAN frame

  1. VLAN Detection is enabled
  2. Sending/receiving frame length is between the maximum TX/RX frame length plus 1 to 4 octets
Stacked VLAN frame
  1. VLAN Detection is enabled
  2. Sending/receiving frame  length is between the maximum TX/RX frame length plus 1 to 8 octets
Resolution

No workaround for this problem exists in current releases of the IP.

This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition software version 20.4.

Related Products

This article applies to 2 products

Intel® Arria® 10 GT FPGA
Intel® Stratix® 10 FPGAs and SoC FPGAs

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