Article ID: 000076245 Content Type: Troubleshooting Last Reviewed: 01/21/2020

Why does the Triple-Speed Ethernet Intel® FPGA IP core with in 2xTBI PCS variant mode fail to detect Ethernet collisions?

Environment

  • Intel® Agilex™ FPGAs and SoC FPGAs
  • Intel® Stratix® 10 TX FPGA
  • Intel® Quartus® Prime Pro Edition
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    Critical Issue

    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition version 19.4 Software, the Triple-Speed Ethernet Intel® FPGA IP mii_col and led_col signals are not asserted when ethernet collision happens for the 2xTBI PCS variant when operating at 10Mbps or 100Mbps rate.

     

    Resolution

    There is no workaround for this problem.

    This problem is fixed starting from the Intel® Quartus® Prime Pro Edition v20.1 Software.

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