Article ID: 000075688 Content Type: Troubleshooting Last Reviewed: 06/30/2021

Why do I see an IP generation error for the E-Tile Hard IP for Ethernet Intel® FPGA IP when 25G SyncE, IEEE 1588 PTP and RSFEC are enabled at the same time?

Environment

  • Intel® Agilex™ FPGAs and SoC FPGAs
  • Intel® Stratix® 10 FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • Ethernet
  • 25G Ethernet Intel® FPGA IP
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    Critical Issue

    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition version 21.2 software, you will observe the IP generation error "The current value "custom_rate_25gx1_fec" for parameter "l_elane_ehip_rate" (l_elane_ehip_rate) is invalid" when 25G SyncE, IEEE 1588 PTP and RSFEC are enabled in the E-Tile Hard IP for Ethernet Intel® FPGA IP.

    Resolution

    There is no workaround for this problem.

    For successful IP generation in version 21.2 only two of these three options can be chosen at the same time.   

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition software.

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