Article ID: 000075485 Content Type: Install & Setup Last Reviewed: 03/10/2023

Why does the Intel® FPGA P-tile Avalon® memory-mapped IP for PCI Express* not support 500MHz PLD Clock Frequency in the Intel® Quartus® Prime Pro Edition Software version 20.4 ?

Environment

    Intel® Quartus® Prime Pro Edition
    Avalon-MM Intel® Stratix® 10 Hard IP for PCI Express
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Critical Issue

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition software version 20.4, "500MHz" is not listed in the "PLD Clock Frequency" menu.

This problem only affects the Intel Agilex® 7 FPGA P-tile PCIe* Gen4 x8 mode generated in the Intel® Quartus® Prime Pro Edition Software version 20.4.

 

 

Resolution

A patch is available to fix this problem for the Intel® Quartus® Prime Pro Edition Software version 20.4.

Download and install Patch 0.11 from the appropriate link below.

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.1.

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs F-Series

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