Article ID: 000074857 Content Type: Troubleshooting Last Reviewed: 02/13/2023

Why does a flash lock/unlock operation fails to work with the Intel® FPGA Generic Quad SPI Controller II IP?

Environment

    Intel® Quartus® Prime Pro Edition
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Description

You may see a failure to lock/unlock a flash sector while using the 'alt_qspi_controller2_lock' driver API in the Intel® FPGA Quad SPI Controller II Core. This is expected behavior if a Write Enable command is not issued before the lock/unlock instruction is performed.

This also impacts the driver API for Intel FPGA Serial Flash Controller II Core.

 

 

Resolution

To perform a successful lock/unlock to a flash sector, ensure the Write Enable instruction is issued prior to using the alt_qspi_controller2_lock or alt_epcq_controller2_lock driver API.

This is scheduled to be fixed in a later release of Intel® Quartus® Prime Software.

Related Products

This article applies to 8 products

Intel® Arria® 10 FPGAs and SoC FPGAs
Arria® V FPGAs and SoC FPGAs
Stratix® V FPGAs
Intel® Stratix® 10 FPGAs and SoC FPGAs
Cyclone® IV FPGAs
Cyclone® V FPGAs and SoC FPGAs
Intel® Cyclone® 10 FPGAs
Intel® MAX® 10 FPGAs

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