Article ID: 000074245 Content Type: Troubleshooting Last Reviewed: 01/07/2020

Why does EDCRC or PR fail under certain conditions when using logic placed at row Y59 in Intel® Arria® 10 GX, SX and Intel® Cyclone® 10 GX devices?

Environment

  • Intel® Arria® 10 SX SoC FPGA
  • Intel® Cyclone® 10 GX FPGA
  • Intel® Arria® 10 GX FPGA
  • Intel® Quartus® Prime Pro Edition
  • Partial Reconfiguration Controller Intel® Arria® 10 Cyclone® 10 FPGA IP
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    Description

    You may encounter unexpected output from clocked components such as Flip Flop/DSP/M20k/LUTRAM that are placed at row 59  in Intel® Arria® 10 GX, SX and Intel® Cyclone® 10 GX devices, if error detection cyclic redundancy check (EDCRC) or partial reconfiguration (PR) feature is enabled.

     

    Below is the list of devices affected:

    Affected DeviceDevice Density/OPN
    Intel® Arria® 10 GXGX160/GX220/GX270/GX320
    Intel® Arria® 10 SXSX160/SX220/SX270/SX320
    Intel® Cyclone® 10 GXGX085/GX105/GX150/GX220


    No error message will be prompted for Intel® Quartus® Prime Software version 18.1 and below. For Intel® Quartus® Prime Software version 18.1.1 and above, the error message is as stated below:

     

    Intel® Quartus® Prime Standard Software version 18.1.1 and above:

    Info (20411): EDCRC usage detected. To ensure reliable operation of these features on the targeted device, certain device resources must be disabled.

    Error (20412): You must create a floorplan assignment to block out device resources at row Y=59 to ensure reliable operation with EDCRC. Use the LogicLock Regions Window to create an empty reserved region with origin X0_Y59, height = 1 and width = <#>.  Also review any existing LogicLock regions that overlap that row to ensure they account for the unused device resources.

     

    Intel® Quartus® Prime Pro Software version 18.1.1 and above:

    Info (20411): PR and/or EDCRC usage detected. To ensure reliable operation of these features on the targeted device, certain device resources must be disabled.

    Error (20412): You must create a floorplan assignment to block out device resources at row Y=59 to ensure reliable operation with PR and/or EDCRC. Use the Logic Lock Regions Window to create an empty reserved region, or add 'set_instance_assignment -name EMPTY_PLACE_REGION "X0 Y59 X<#> Y59-R:C-empty_region" -to |' directly to your Quartus Settings File.  Also review any existing Logic Lock regions that overlap that row to ensure they account for the unused device resources.

     

    Resolution

    To work around this, apply the empty logic lock region instance in the Quartus Prime Settings File (.qsf)  to avoid using row Y59.

     

    Empty logic lock region instance for Intel® Quartus® Prime Pro software:

    From Intel® Quartus® Prime Pro software version 17.1 onwards:

    set_instance_assignment -name EMPTY_PLACE_REGION "X0 Y59 X<LAST X COORDINATE> Y59-R:C-empty_region" -to |

     

    For example:

    If you are using Arria 10 GX320, apply the LAST X COORDINATE value in the Quartus Prime Setting(.qsf) as shown below.

    set_instance_assignment -name EMPTY_PLACE_REGION "X0 Y59 X150 Y59-R:C-empty_region" -to |

     

    Prior to Intel® Quartus® Prime Pro software version 17.1, use the instance below:

    set_instance_assignment -name PLACE_REGION "X0 Y59 X<LAST X COORDINATE> Y59" -to fake_name

    set_instance_assignment -name RESERVE_PLACE_REGION ON -to fake_name

    set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to fake_name

     

    For example:

    If you are using Arria 10 GX320, apply the LAST X COORDINATE value in the Quartus Prime Setting(.qsf) as shown below.

    set_instance_assignment -name PLACE_REGION "X0 Y59 X150 Y59" -to fake_name

     

    Note: Please refer to Table 1 for LAST X COORDINATE value.

     

    Table 1:

    Device OPNLAST X COORDINATE
    Intel® Arria® 10 GX160/GX220102
    Intel® Arria® 10 GX270/GX320150
    Intel® Arria® 10 SX160/SX220102
    Intel® Arria® 10 SX270/SX320150
    Intel® Cyclone® 10 GX085/GX105102
    Intel® Cyclone® 10 GX150/GX220102

     

    Empty logic lock region instance for Intel® Quartus® Prime Standard software :

    set_global_assignment -name LL_ENABLED ON -section_id "block_y59"

    set_global_assignment -name LL_STATE LOCKED -section_id "block_y59"

    set_global_assignment -name LL_RESERVED ON -section_id "block_y59"

    set_global_assignment -name LL_CORE_ONLY ON -section_id "block_y59"

    set_global_assignment -name LL_ORIGIN X0_Y59 -section_id "block_y59"

    set_global_assignment -name LL_HEIGHT 1 -section_id "block_y59"

    set_global_assignment -name LL_WIDTH  <WIDTH OF DEVICE> -section_id "block_y59"

    set_global_assignment -name LL_AUTO_SIZE OFF -section_id "block_y59"

     

    For example:

    If you are using Arria 10 GX320, apply the WIDTH OF DEVICE value in the Quartus Prime Setting(.qsf) as shown below.

    set_global_assignment -name LL_WIDTH 151 -section_id "block_y59"

     

    Note: Please refer to Table 2 for WIDTH OF DEVICE value.

     

    Table 2:

    Device OPNWIDTH OF DEVICE
    Intel® Arria® 10 GX160/GX220103
    Intel® Arria® 10 GX270/GX320151
    Intel® Arria® 10 SX160/SX220103
    Intel® Arria® 10 SX270/SX320151

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