Article ID: 000074151 Content Type: Troubleshooting Last Reviewed: 03/06/2020

Why does the Intel® Quartus® Prime software device pin-out show a different number of pins compared to the Intel® Cyclone® 10 LP Device Overview?

Environment

  • Intel® Cyclone® 10 LP FPGA
  • Intel® Quartus® Prime Standard Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When targeting Intel® Cyclone® 10 LP devices in the Intel Quartus® Prime software, you will notice that there is 1 pin difference in the total pin count if compared to the Intel® Cyclone® 10 LP Device Overview.

    For example, the Intel® Quartus® Prime software lists 151 I/O pins for 10CL025YU256I7G, but in other documents it is listed as 150 I/O pins.

    This difference is due to the fact that in the Intel® Quartus® Prime software, the DCLK is counted as an I/O, since it can be used in user mode but in the respective device pin table, DCLK is not counted as an I/O. Thus, you will find 1 pin difference between the Intel Cyclone 10 LP Device Overview and Intel Quartus Prime software.

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.