Description
When you enabled PCIe CvP containing multiple PCIe interfaces, you will need to make sure that your device is able to enter usermode within 1s after the PERST# reset. If FPGA is not able to enter user mode within the time limit then you might observed device not detected or system crash.
You may refer to PCIe Base Specification Chapter 6.6.1 for more information on the PCI Express* Reset rules.
Resolution
We recommend you to use Autonomous mode which is able to guarantee that the FPGA is able to enter user mode within the time limit.