Article ID: 000074062 Content Type: Product Information & Documentation Last Reviewed: 05/16/2025

How to enable real-time ISP using Serial Vector File (.svf) in the command line for the Max® 10 FPGA devices?

Environment

    Intel® Quartus® Prime Standard Edition
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Description

You can use the convert programming file tool in the Quartus® Prime software to generate a Serial Vector File (.svf) with the Real-Time ISP enabled with the following command line:

quartus_cpf -c -q 10MHz -g 3.3 -n p base.pof base.svf -o background_programming=on

Where:
-q 10MHz is the JTAG Freq
-g 3.3 is the voltage
base.pof is the file to convert
base.svf is the resulting .svf file

Resolution

This information is scheduled to be added in the next release of the MAX® 10 FPGA Configuration User Guide.

Related Products

This article applies to 1 products

Intel® MAX® 10 FPGAs

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