Why does the FPGA SDK for OpenCL version 19.2 show PR(Partial Reconfiguration) failures when programming an OpenCL kernel using Stratix®10 devices from certain host systems?

Due to a problem  in the Intel® FPGA SDK for OpenCL version 19.2, you may see PR failures when programming an OpenCL kernel using Stratix®10 devices from certain host systems due to an out-of-order DMA issue .

To workaround this problem, switch back to PIO PR mode

 1) Open the file located at linux64/driver/hw_pcie_constants.h

 2) replace the line that specifies the ACL_PR_DMA_VERSIONID to the following:

            #define ACL_PR_DMA_VERSIONID  0xA0C7C1E6

3) Afterwards re-run aocl uninstall and aocl install for the new driver to be built and deployed.

This problem is scheduled to be fixed in a future version of the Intel® FPGA SDK for OpenCL software.