Description
Due to a problem in the Intel® Arria® 10 SoC device, there are chances that you may observe the HPS EMAC in RMII mode producing double data rate. This phenomenon may be due to board setup or layout issues. The actual root cause is unidentified.
Resolution
To work around this problem, you can implement a soft logic IP converter for MII to RMII by routing EMAC IO to FPGA fabric through HPS shared IO. These RMII signal pins are then routed back to the same EMAC signal pins. Be aware that this workaround consumes a large amount of HPS pins.
Intel recommends the user implement RGMII mode which is the preferred EMAC interface with proven functionality and higher bandwidth.