How to Obtain Bandwidth Information of CXL Memory and Intel® Xeon® Processors?

How do we obtain bandwidth information of CXL memory?

To obtain bandwidth information of CXL memory on a 4th Gen Intel® Xeon® Scalable processor, you can use the Intel Memory Latency Checker (Intel® MLC) tool.

1. Install Intel® MLC: Ensure that Intel® Memory Latency Checker (Intel® MLC) is installed on your system.
2. Discover CXL Memory: Discover CXL Memory: Use commands like lspci and ndctl to discover and verify the CXL memory devices attached to your system.

   For example:

   • lspci to list PCI* devices.
   • ndctl for tasks such as creating memory regions and listing attached memory.
3. Run Memory Bandwidth Scan: Use the Intel® MLC tool to perform a memory bandwidth scan. The command line parameters you need to use include --memory_bandwidth_scan.

   Here is an example command: ./mlc --memory_bandwidth_scan

   This command runs a memory bandwidth scan using multiple threads to access memory on a specific NUMA node.

4. Analyze Results: The output will provide a detailed report of the bandwidth in MB/sec across different memory regions. For example, the output may look like:

   Histogram report of BW in MB/sec across each 1GB region on NUMA node 2
   BW_range(MB/sec) #_of_1GB_regions
   ---------------- ----------------
   [15000-19999] 15
   Detailed BW report for each 1GB region allocated as 4KB page on NUMA node 2
   phys_addr MB/sec
   --------- ------
   0x4300fef000 16960
   0x4300c00000 17674
   ...

   

   Results:

   

5. Idle and Loaded Latency Tests: Perform additional tests such as idle latency and loaded latency to get comprehensive bandwidth and latency data:

   Idle Latency: ./mlc --idle_latency

   

   Loaded Latency: ./mlc --loaded_latency

   

   These steps will help you obtain detailed bandwidth information of CXL memory on the Intel® Xeon Scalable processors.