What Is Linear Address Masking (LAM) on Intel® Xeon® 6 Processors with E-Cores?

Linear Address Masking (LAM) is a feature introduced in Intel® Xeon® 6 Processors with E-Cores to improve the performance and scalability of multi-socket systems.

Memory corruption bugs are difficult to find. LAM uses the normally unused bits of virtual addresses for SW metadata to assist debugging. 

What is Linear Address Masking (LAM)?

Linear Address Masking is a technique used to optimize the way processors access memory in a multi-socket system. In a multi-socket system, each processor has its own local memory, and the system uses a technique called  Uniform Memory Access (UMA) to access memory across all sockets.

LAM is a mechanism that allows the processor to selectively mask (or filter) out certain address ranges from being accessed by the processor. This is useful in scenarios where a processor needs to access a specific subset of memory, rather than the entire address space.

How does LAM work?

When LAM is enabled, the processor uses a mask to filter out certain address ranges. The mask is applied to the linear address (the virtual address used by the processor) before it is translated to a physical address. The resulting masked address is then used to access the memory.

LAM uses a 32-bit or 64-bit mask, depending on the processor architecture. The mask is programmed by the operating system or firmware, and it can be updated dynamically as needed.

Benefits of LAM

The Linear Address Masking feature provides several benefits, including:

1. Improved performance: By selectively masking out address ranges, LAM can reduce the number of memory accesses, which can improve system performance.
2. Increased scalability: LAM enables the system to support more sockets and more memory, making it suitable for large-scale systems.
3. Better memory utilization: By allowing processors to access specific subsets of memory, LAM can improve memory utilization and reduce memory waste.

In summary

Linear Address Masking (LAM) is a feature introduced in Intel Xeon 6 processors with E-Cores that allows processors to selectively mask out certain address ranges, improving performance, scalability, and memory utilization in multi-socket systems.

For more details, visit: Hardware Features and Behaviors Related to Speculative Execution.