Intel® Ethernet Controller E810 PCIe* Lane Margin Application Note
Content Type: Product Information & Documentation | Article ID: 000098532 | Last Reviewed: 03/28/2024
This document describes the validation recommendations for the PCI Express* (PCIe*) Lane Margining feature of the Intel® Ethernet Controller E810 (E810). The margin methodology, the margin masks for risk evaluation, and other guidance in this document are subject to change as the product and/or tool matures.
Intel® Ethernet Controller E810 PCIe* Lane Margin Application Note