The latest security information on Intel® products.
Potential for Signature Integrity Compromise and HMAC secret recovery in Intel® Integrated Performance Primitives (Intel® IPP) Cryptography Domain
The cryptography (CP) domain in Intel’s newest version of Intel® Integrated Performance Primitives (Intel® IPP) v7.1.1 has been enhanced to improve its security and customers are strongly urged to update to this release.
Intel IPP v7.1.1 introduces Intel® AVX & Intel® AVX2 performance optimizations for faster floating-point and integer operations in the signal processing and image processing domains. Additional
Security Improvements have been made to the CP domain’s Triple DES, AES and HMAC implementations. Customers can get these security improvements by linking with version 7.1.1 of Intel® IPP. For additional information on performance impact to Triple DES, please see the Recommendations below.
The cryptography (CP) domain in Intel® Integrated Performance Primitives (Intel® IPP) versions prior to 7.1.1
Customers are strongly urged to update to version 7.1.1 which can be obtained from this URL: http://software.intel.com/en-us/articles/download-ipp-cryptography-libraries/
The Triple DES implementation in IPP 7.1.1 mitigates a previously identified potential vulnerability [and is more secure than prior versions], however, that resulted in some performance reduction, ranging between 35% and 70%. At this time there is no known mitigation for this performance impact in Triple DES.
Optimization Notice Notice revision #20110804
Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
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