The ALT_BIDIR_BUF primitive allows you to make low-level assignments with the altddio_bidir Intel® FPGA IP. This primitive allows you to do the following:

  • Make a location assignment
  • Make an I/O standards Definition assignment
  • Make a drive strength (current strength) assignment
  • Make a slew rate assignment to the bidirectional pin connected to the altddio_bidir Intel® FPGA IP
  • Make an on-chip termination assignment
  • Enable bus hold circuitry
  • Enable weak pull up resistor

This primitive is available for CycloneIII and StratixIII devices only.

The ALT_BIDIR_BUF primitive is not supported by AHDL.

  • This primitive can be used only with an altddio_bidir Intel® FPGA IP.
  • Trying to set other parameters not listed in the Parameters table on the ALT_BIDIR_BUF primitive results in errors.
  • For information about Intel® Quartus® Prime primitive instantiation, see Using a Intel® Quartus® Prime Logic Function.