lpm_ram_io Intel® FPGA IP

Parameterized RAM with a single I/O port Intel® FPGA IP. This Intel® FPGA IP is provided only for backward compatibility; instead, Intel recommends using the altsyncram Intel® FPGA IP. The lpm_ram_io function uses Embedded System Blocks (ESBs) in some obsoleted devices, Embedded Array Blocks (EABs) in other obsoleted devices, or DFFE primitives or latch arrays in MAX3000 and MAX7000 devices or if the USE_EAB parameter set to "OFF". Intel strongly recommends using synchronous rather than asynchronous RAM functions.

  • The Compiler automatically implements this function in logic cells in MAX3000 and MAX7000 devices.
  • You can use the Assignment Editor to add, change, or delete assignments and assignment values for Intel® FPGA IP.
Note: More information is available on the lpm_ram_io Intel® FPGA IP on the Altera website.