Truth Table/Functionality

Synchronous Read or Write to Memory (all inputs registered)

inclock

we

outenab

Function



L

L

High impedance (output not enabled).



X

H

The memory location pointed to by address[] is read to dio[].



H

L

dio[] is written to the memory location pointed to by address[].

For devices withEmbedded System Blocks (ESBs)orEmbedded Array Blocks (EABs), the lpm_ram_ioIntel® FPGA IP internally writes the data to memory while the write clock is low.

Synchronous Read from Memory

outclock

we

outenab

Function



L

H

The output register is loaded with the contents of the memory location pointed to by address. dio[] outputs the contents of the output register.

not

L

H

No change. dio[] is held constant until the next clock. Data changes on next outclock.

Totally asynchronous memory operations occur when neither inclock nor outclock is connected. The output q is asynchronous and reflects the data in the memory location pointed to by address[].

Asynchronous Memory Operations

we

outenab

Function

L

L

High impedance (output not enabled).

X

H

No change (No we).

H

L

dio[] is written to the memory location pointed to by address[]. The address[] port should not change while we is high (outenab is low). If the data on the address[] port changes while we is high (outenab is low), all memory locations that are addressed are overwritten with dio.

Note:

Note: we does not act as a clock enable for the outclock output clock.