Output Ports
Port Name |
Required |
Description |
Comments |
|---|---|---|---|
dqinclk[] |
Yes |
Phase shifted DQS strobe generated for the DQ input registers from the DQS input. |
The width of the bus is equal to the number of DQS pins. Output port [NUMBER_OF_DQS-1..0] wide. |
dqsundelayedout |
No |
Undelayed outputs from the DQS pins. |
The width of the bus is equal to the number of DQS pins. Output port [NUMBER_OF_DQS-1..0] wide. |