AHDL Function Prototype (port name and order also apply to Verilog HDL)

The following AHDL function prototype is located in the AHDL Include File (.inc) Definitionaltdq.inc in the <Quartus^® Prime installation directory>\libraries\megafunctions directory.

FUNCTION altdq (

        aclr,

        aset,

        datain_h[NUMBER_OF_DQ-1..0],

        datain_l[NUMBER_OF_DQ-1..0],

        ddioinclk,

        inclock,

        inclocken,

        oe,

        outclock,

        outclocken

)

WITH (

        DDIOINCLK_INPUT,

        EXTEND_OE_DISABLE,

        INVERT_INPUT_CLOCKS,

        NUMBER_OF_DQ,

        OE_REG,

        POWER_UP_HIGH

)

RETURNS (

        dataout_h[NUMBER_OF_DQ-1..0],

        dataout_l[NUMBER_OF_DQ-1..0],

        padio[NUMBER_OF_DQ-1..0]

);