RES-50010: Reset Synchronizer Chains with Constant Output


Violations of this rule identify asynchronous reset synchronizer chains that are fed by a constant data signal with the same value as what it is reset to. Such a chain is therefore inactive.


Feed the head register of reset chains by a constant of an opposite value to the reset value of registers in the chain.



Device Family

  • Intel® Cyclone® 10 GX
  • Intel® Arria® 10
  • Intel® Stratix® 10
  • Intel® Agilex™