RES-10202: Register Power-Up Settings Conflict with Device Settings


Violations of this rule identify register names with initial values dropped. When the DISABLE_REGISTER_POWER_UP_INITIALIZATION power-up setting is ON, register initial conditions become undefined on the device. This condition reduces bitstream size at the expense of globally dropping initial register values.

Note: Because this setting is global, when this setting is ON, Intel FPGA and third-party IP lose their initial values, which can cause those IP to fail. Ensure that all IP in the design are compatible with this global setting.


Confirm functional correctness of dropping initial register values. Next, assign the setting IGNORE_REGISTER_POWER_UP_INITIALIZATION ON to registers or their hierarchy to waive those initial values.




Tag Description
reset-usage Design rule checks related to safe resets or appropriate use of reset modes.

Device Family

  • Intel Agilex®
  • Intel Agilex®
  • Intel Agilex®
  • Intel®Stratix® 10