IPC-40038: Individual bit of Control Unit clock of Reset Sequencer IP can drive only a single instance of Ethernet or PCIE IP.

Description

Individual bit of Control Unit clock bus of Reset Sequencer IP can drive only a single instance of Ethernet and PCIE IP. Since every quad allows only a single instance of Ethernet or PCIE IP, and individual bits of the Control Unit clock bus (o_pma_cu_clk) can handle transceivers of a single quad, it is not possible to place multiple instances of ethernet or PCIE IPs, driven by the same bit of Control unit clock bus bit.
Figure 1. Single Ethernet or PCIE IP per Control unit clock port of Reset Sequencer IP

Recommendation

Ensure that the individual bit of the Control Unit clock bus of the Reset Sequencer IP handles only one instance of Ethernet or PCIE IP.

Severity

Critical

Tags

Tag Description
system Design rule checks which validate full-system design.

Device Family

  • Agilex®