CLK-30027: Multiple Clock Assignments Found


Violations of this rule identify registers with more than one clock reaching the register clock pin without clock group assignments. When multiple clocks reach a register clock pin, the Compiler cannot determine which clock to use for analysis.


If only one clock is intented, delete any extra clock assignment. If multiple clocks are intented, refer to CLK-30034 and CLK-30035 for setting proper clock group assignments.




Tag Description
sdc Design rule checks related to SDC validity checking.

Device Family

  • Intel®Cyclone® 10 GX
  • Intel®Arria® 10
  • Intel®Stratix® 10
  • Intel Agilex®
  • Intel Agilex®
  • Intel Agilex®