BBD-60001: Partial Reconfiguration or Reserved Core Input Port(s) does not Drive a Register
Description
Violations of this rule identify the Partial Reconfiguration (or Reserved Core) partition input boundary ports that are not driving FF/RAM/DSP eventually.
Connecting the Partial Reconfiguration (or Reserved Core) partition input ports to FF/RAM/DSP inside the partition helps ensure that the placement and routing of elements along the path is routing-driven.
Note: This rule will only check Partial Reconfiguration (or Reserved Core) designs.
Recommendation
In the HDL design files, define registers to gate the input boundary ports of Partial Reconfiguration (or Reserved Core) partitions.
Severity
Medium
Tags
| Tag | Description |
|---|---|
| partial-reconfiguration | Design rule checks which check Partial Reconfiguration designs. |
Device Family
- Arria® 10
- Stratix® 10
- Agilex®
- Agilex®
- Agilex®