Others Related concepts Automatic Asynchronous Signal Pipelining -- Allow Asynchronous Signal that Fans Out to Synchronous Inputs logic option Automatic Asynchronous Signal Pipelining Register Reach logic option Disable Design Assistant Rule logic option EDA Formal Verification Hierarchy logic option Enable Design Assistant Rule logic option Enable Message logic option Input Delay from Dual-Purpose Clock Pin to Fan-out Destinations logic option Power Analyzer Report Power Dissipation logic option Power Analyzer Report Signal Activity logic option Power Input File Settings logic option