Input Ports
Port Name |
Required |
Description |
|---|---|---|
tck |
Yes |
This signal is used if ENABLE_JTAG_IO_SELECTION is not zero and select_this input is high. |
tdi |
Yes |
This signal is used if ENABLE_JTAG_IO_SELECTION is not zero and select_this input ishigh. |
tms |
Yes |
This signal is used if ENABLE_JTAG_IO_SELECTION is not zero and select_this input ishigh. |
select_this |
No |
If this input is high, the JTAG accessible extension is connected to the tck, tdi, tms and tdo ports on this Intel® FPGA IP. If this input is low, theJTAG accessible extension is connected to the normal device JTAG pins by the hard configuration logic. This signal is not used if ENABLE_JTAG_IO_SELECTION is zero. |